1 /*
2 * Debugger CPU backend definitions
3 *
4 * Copyright 2004 Eric Pouech
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
19 */
20
21 enum be_cpu_addr {be_cpu_addr_pc, be_cpu_addr_stack, be_cpu_addr_frame};
22 enum be_xpoint_type {be_xpoint_break, be_xpoint_watch_exec, be_xpoint_watch_read,
23 be_xpoint_watch_write};
24 struct backend_cpu
25 {
26 /* ------------------------------------------------------------------------------
27 * address manipulation
28 * ------------------------------------------------------------------------------ */
29 /* Linearizes an address. Only CPUs with segmented address model need this.
30 * Otherwise, implementation is straightforward (be_cpu_linearize will do)
31 */
32 void* (*linearize)(HANDLE hThread, const ADDRESS64*);
33 /* Fills in an ADDRESS64 structure from a segment & an offset. CPUs without
34 * segment address model should use 0 as seg. Required method to fill
35 * in an ADDRESS64 (except an linear one).
36 * Non segmented CPU shall use be_cpu_build_addr
37 */
38 unsigned (*build_addr)(HANDLE hThread, const CONTEXT* ctx,
39 ADDRESS64* addr, unsigned seg,
40 unsigned long offset);
41 /* Retrieves in addr an address related to the context (program counter, stack
42 * pointer, frame pointer)
43 */
44 unsigned (*get_addr)(HANDLE hThread, const CONTEXT* ctx,
45 enum be_cpu_addr, ADDRESS64* addr);
46
47 /* returns which kind of information a given register number refers to */
48 unsigned (*get_register_info)(int regno, enum be_cpu_addr* kind);
49
50 /* -------------------------------------------------------------------------------
51 * context manipulation
52 * ------------------------------------------------------------------------------- */
53 /* Enables/disables CPU single step mode (depending on enable) */
54 void (*single_step)(CONTEXT* ctx, unsigned enable);
55 /* Dumps out the content of the context */
56 void (*print_context)(HANDLE hThread, const CONTEXT* ctx, int all_regs);
57 /* Prints information about segments. Non segmented CPU should leave this
58 * function empty
59 */
60 void (*print_segment_info)(HANDLE hThread, const CONTEXT* ctx);
61 /* Do the initialization so that the debugger has internal variables linked
62 * to the context's registers
63 */
64 const struct dbg_internal_var*
65 (*init_registers)(CONTEXT* ctx);
66 /* -------------------------------------------------------------------------------
67 * code inspection
68 * -------------------------------------------------------------------------------*/
69 /* Check whether the instruction at addr is an insn to step over
70 * (like function call, interruption...)
71 */
72 unsigned (*is_step_over_insn)(const void* addr);
73 /* Check whether instruction at 'addr' is the return from a function call */
74 unsigned (*is_function_return)(const void* addr);
75 /* Check whether instruction at 'addr' is the CPU break instruction. On i386,
76 * it's INT3 (0xCC)
77 */
78 unsigned (*is_break_insn)(const void*);
79 /* Check whether instruction at 'addr' is a function call */
80 unsigned (*is_function_call)(const void* insn, ADDRESS64* callee);
81 /* Ask for disassembling one instruction. If display is true, assembly code
82 * will be printed. In all cases, 'addr' is advanced at next instruction
83 */
84 void (*disasm_one_insn)(ADDRESS64* addr, int display);
85 /* -------------------------------------------------------------------------------
86 * break points / watchpoints handling
87 * -------------------------------------------------------------------------------*/
88 /* Inserts an Xpoint in the CPU context and/or debuggee address space */
89 unsigned (*insert_Xpoint)(HANDLE hProcess, const struct be_process_io* pio,
90 CONTEXT* ctx, enum be_xpoint_type type,
91 void* addr, unsigned long* val, unsigned size);
92 /* Removes an Xpoint in the CPU context and/or debuggee address space */
93 unsigned (*remove_Xpoint)(HANDLE hProcess, const struct be_process_io* pio,
94 CONTEXT* ctx, enum be_xpoint_type type,
95 void* addr, unsigned long val, unsigned size);
96 /* Checks whether a given watchpoint has been triggered */
97 unsigned (*is_watchpoint_set)(const CONTEXT* ctx, unsigned idx);
98 /* Clears the watchpoint indicator */
99 void (*clear_watchpoint)(CONTEXT* ctx, unsigned idx);
100 /* After a break instruction is executed, in the corresponding exception handler,
101 * some CPUs report the address of the insn after the break insn, some others
102 * report the address of the break insn itself.
103 * This function lets adjust the context PC to reflect this behavior.
104 */
105 int (*adjust_pc_for_break)(CONTEXT* ctx, BOOL way);
106 /* -------------------------------------------------------------------------------
107 * basic type read/write
108 * -------------------------------------------------------------------------------*/
109 /* Reads an integer from memory and stores it inside a long long int */
110 int (*fetch_integer)(const struct dbg_lvalue* lvalue, unsigned size, unsigned is_signed, LONGLONG*);
111 /* Reads a real from memory and stores it inside a long double */
112 int (*fetch_float)(const struct dbg_lvalue* lvalue, unsigned size, long double*);
113 };
114
115 extern struct backend_cpu* be_cpu;
116
117 /* some handy functions for non segmented CPUs */
118 void* be_cpu_linearize(HANDLE hThread, const ADDRESS64*);
119 unsigned be_cpu_build_addr(HANDLE hThread, const CONTEXT* ctx, ADDRESS64* addr,
120 unsigned seg, unsigned long offset);
121
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